Alongside today’s announcement of the EPYC 97×4 ‘Bergamo’, AMD’s other big CPU announcement this morning is that the large cache capacity ‘Genoa-X’ EPYC processors are now shipping. First revealed by AMD last June, Genoa-X is an EPYC server CPU with the now AMD-mandated V-Cache, by stacking 64MB of L3 V-Cache dies on top of each CCD. , boosting the L3 cache capacity of AMD’s core composite die. . With this extra cache, a fully loaded Genoa-X CPU can provide up to 1152MB of total L3 cache.
Genoa-X is the successor to Milan-X, the 1st Gen V-Cache part of AMD. Like its predecessor, AMD is using cache die stacking to add more L3 cache to the regular Genoa Zen 4 CCD, allowing it to produce high cache chips without actually laying out a completely separate die in the factory. We’re giving AMD new ways to manufacture designs. In this case, with his 12 CCDs on the Genoa/Genoa-X chip, AMD could add 768MB of his L3 cache to the chip.
Like the previous generation, these high-cache SKUs are specifically aimed at a niche market segment of workloads that would benefit from additional cache (what AMD calls the “technical computing” market). To take full advantage of the additional cache, you should limit your workload’s cache capacity. In other words, we need to gain significant benefits from having more data available on-chip via a larger L3 cache. This is typically just a subset of server/workstation workloads such as fluid dynamics, databases, and electronic design automation. That’s why these high-cash chips serve a narrow segment of the market. However, as we saw with Milan-X, in the right circumstances, it can provide significant performance benefits.
| AMD EPYC 9084X Genoa-X Processor | |||||||||
| anand tech | core/ thread |
base frequency |
1T frequency |
L3 cache |
PCIe | memory | TDP (W) |
price (1KU) |
|
| 9684X | 96 | 192 | 2550 | 3700 | 1152MB | 128×5.0 | 12x DDR5-4800 | 400 | $14,756 |
| 9384X | 32 | 64 | 3100 | 3900 | 768MB | 128×5.0 | 12x DDR5-4800 | 320 | $5,529 |
| 9184X | 16 | 32 | 3550 | 4200 | 768MB | 128×5.0 | 12x DDR5-4800 | 320 | $4,928 |
Being genuine Genoa chips otherwise, the Genoa-X chips use the same SP5 socket as Genoa and Bergamo. AMD has not revealed his TDP but based on Milan-X, we would expect a TDP in a similar range. The additional cache and its placement on top of the CCD means that a CCD with V-cache consumes more power, and the cache die poses some additional challenges with regards to cooling. So there are some trade-offs involved between the performance gains from the additional cache and the performance losses from staying within his TDP range on the SP5 platform.
As with Bergamo, we will share more details about Genoa-X in the near future. stay tuned!
