Known Technique Addressing Known Problem Satisfies KSR’s Motivation to Combine Analysis

On March 13, the United States Court of Appeals for the Federal Circuit (CAFC) ruled that Intel v. PACT XPP Schweiz AG Intel has overturned the final written decision of the Patent Trial and Appeal Board (PTAB) finding that PACT’s patent claims have failed to be shown to be invalid as to obviousness. Based on a flexible analysis presented by the U.S. Supreme Court’s landmark 2007 obviousness ruling, the Federal Circuit found Intel’s “known technology” rationale in support of its motivation to combine prior art references. Overturned the judgment that the PTAB improperly dismissed the grounds. KSR vs Teleflex.

Intel Challenges Patent Claims Relating to Multiprocessor Systems That Improve Cache Coherency

PACT owns US Patent No. 9250908. Multiprocessor Bus and Cache Interconnect SystemThe ‘908 patent prevents inconsistencies that can occur when a processor modifies a local data file and the modifications are not propagated to each cache memory, and ensures the consistency of data files stored in multiple cache memories. It claims a multiprocessor system with a specific architecture designed to improve performance. At issue on appeal was the language of independent claim 4 of the ‘908 patent, which read that an interconnection system “interconnects each isolated cache segment with an adjacent isolated cache segment.” Includes claim limitations.

After PACT asserted the ‘908 patent against Intel in several lawsuits filed in the District of Delaware and the District of Northern California, Intel sued the PTAB. between the parties The Prosecution (IPR) challenges PACT’s patent claim validity to be clearer than the prior art. In a final written decision issued in August 2021, the PTAB held that the prior art reference contained a teaching, suggestion, or motivation for combination and that the combination of the two prior art references was , dismissed Intel’s claim that it represented improving similar devices on the same device using known technology. the way.

Intel asserted a pair of prior art references during IPR prosecution, and the Federal Circuit’s decision held that during IPR prosecution, PACT found that the combination of these references taught each of the limitations of claim 4. I noted that I did not object to this. These prior art references include one US patent alleging a processor system that maintains cache coherency using a “snooping” system along a shared bus (a “wall book”), and another US patent: claims a multiprocessor data processing system designed to maintain cache coherency by utilizing a global segmented second-level cache (“Baumann”).

CAFC: Known Technologies Need Only Be Good Options To Satisfy KSRMoreAnalysis of

During the IPR proceedings at the PTAB, Intel said that those skilled in the art combined the known technology of Baumann’s Global Level 2 Cache with Kabemoto’s internal Snoop Bus to create the interconnection system claimed by the ‘908 patent. In dismissing Intel’s “known technology” rationale, the PTAB found that ordinary engineers would not view Baumann’s technology as a clear improvement on Kabemoto. Because Kabemoto has already tackled the problem of cache coherency with techniques similar to those taught by Baumann.

As the Federal Circuit argued in a decision issued this week, the PTAB’s reasoning on this point runs counter to the PTAB’s own conclusion that the known art rationale provides no incentive to combine Bauman and Kabemoto. bottom. “The fact that Kabemoto and Baumann were working on the same problem, and Baumann’s cache was a known way of addressing that problem, is precisely why we are motivated to work together. KSRMore and our precedent,” read a Federal Circuit panel decision authored by Federal Circuit Judge Sharon Prost. The Federal Circuit did not address Intel’s allegations of teaching, suggestion, or combination motives present in Kabmoto or Bauman because the known art rationale was sufficient to overrule them.

under KSRMore The motivation to combine the analyzes is sufficiently flexible that “any need or problem known in the field of endeavor at the time of invention and addressed by the patent” can provide the necessary motivation.ever since KSRMorethe Federal Circuit found that a “universal” motive for improving technology within a particular field is “without hints of suggestion Highlighted language in Federal Circuit 2021 ruling Intel vs QualcommAccording to the Federal Circuit, these cases demonstrate that where known technology exists to address known problems using prior art elements according to established functionality, there is motivation to combine. . “And we specify address ‘[i]the combination is number one option, that appropriate options,” said Judge Prost. intel.

“There is a known problem with cache coherency, Bauman’s second-level cache helped address that problem, and Intel shows that combining the wall book and Bauman’s teachings was no more than the skill of an ordinary craftsman.” Nothing more is needed to demonstrate the motivation to join below KSRMore, therefore, we reverse the Board’s decision to the contrary. ”

Remanded to PTAB for Remaining Patentability Dispute Regarding Claim 5

The Federal Circuit also reversed the PTAB’s determination that Bauman did not teach an intersegment limitation recited in claim 4 of the PACT ‘908 patent. The Court of Appeal found that Bauman’s Figure 6 “does teach, if not explicitly,” the alleged inter-segment limitation. “That’s Intel’s and PACT’s understanding on the board, and our understanding from the record on appeal,” he wrote Judge Prost. “I can’t find any other reasonable understanding of this figure.”

The Federal Circuit reversed both factual findings Intel appealed to the PTAB, but the Court of Appeals remanded the case to the PTAB to address the patentability dispute regarding claim 5 of the ‘908 patent. While the validity of claim 4’s language was challenged in the Federal Circuit, the IPR proceedings focused on claim 5 of the ‘908 patent. Interconnect systems in chronological order.